1. Field of the Invention
The present invention relates generally to data processing systems and more precisely to central processors provided with a plurality of input/output channels for connection with peripheral units.
2. Description of the Prior Art
It is known that data processing systems generally include a central processor, a main working memory and a plurality of peripheral units connected to the central processor through a plurality of information exchange (input/output) channels. From the logical point of view, the central processor may be divided into a control unit and an execution unit.
The task of the data processing system is to perform operative processes on data according to well defined program instructions. The operations are coordinated by the control unit within the central processor of the system. The operative processes may be internal (that is, executed within the central processor), or internal/external (that is, require, in addition, the intervention of a peripheral unit). In the latter case, they require the transfer of information to and from the central processor through the input/output channels which connect the peripheral unit to the central processor and which enable the execution of operations for such information transfer.
The operation of peripheral devices and the execution of processes on them are not synchronized either with respect to the operation of the central processor or with respect to each other. The supervision of the whole system is not performed with a program uniquely defined from the point of view of timing, but rather performed with "interrupts" which request execution of predetermined services during suitable phases of execution of a program.
Interrupts may be caused by interrupt requests coming from the peripheral devices. Following an interrupt request, the central processor may interrupt the execution of an internal process under execution so as to dedicate itself to the service requested by the peripheral device. Different criteria may be established for classifying the interrupt requests. For the moment, it suffices to remark that such requests are physically characterized by the presence of a suitable electrical signal pulse or continuous signal on one or more wires comprising the information exchange channels which connect the central processor to the peripheral devices. In systems having a plurality of input/output channels, several interrupt requests may be contemporaneously sent to the central processor through different channels. Therefore, it is mandatory to establish priority criteria; that is, to define an order for honoring different interrupt requests. In addition, it is clear that in the same way interrupt requests may interrupt internal processes, interrupt requests having a high priority may interrupt execution of services granted to previous interrupt requests having a lower hierarchical priority level.
The latter feature has a remarkable impact on the physical structure of the computer. In fact, as it is known in the prior art, if interrupt requests do not have the power of interrupting external services, the central processor needs only physical resource to "remember" the status of the internal process which is interrupted (so as to be able to resume it,) and also needs sufficient physical resources to sustain a single external service. Vice versa, when interrupt requests have a reciprocal interrupting power on the basis of relative priority level, the physical resources to sustain the external services must be multiplied. For each input/output service, there must be means for accounting for the circumstances that an interrupt request of higher level on a different channel could interrupt the external process in the course of being serviced, so that the status of each external process must be "remembered." Such multiplication of physical resources is required in order to execute contemporaneously a plurality of external services, (according to a "time sharing" technique,) in which subsequent time intervals are assigned to the execution of a plurality of external processes. The multiplication of physical resources is generally expensive, because it is necessary to provide for each channel a whole set of registers and input/output paths for such registers controlled by suitable gating circuitry.
This problem is particularly important in data processing systems where many peripheral devices and control functions are performed by the central processor (instead of being performed by an external control unit). In this case, the complexity of the services to be performed is increased, and accordingly, the need for more complex physical resources dedicated to such services is also increased. Multiplication of physical resources may be reduced in part by using the main working memory as a physical support for the information to be remembered. However, there is the need to load into the memory and to read from the memory at each interrupt, a whole set of information requiring significant time and system overhead, thereby remarkably reducing system performance. Consequently, the main memory approach is used in very limited cases. Generally, it is preferred to use a plurality of registers dedicted to the different channels.
If complete performance equivalence is desired for each channel, (that is, the capability of connecting indifferently to each channel for any one of the different kinds of peripheral devices) multiplication of physical resources must be made so as to allow for keeping account of the needs of all the possible services. This involves a wasting of physical resources because, in general, a channel may transfer only one interrupt request for a service at a time, and for more services even if of different kind. Furthermore, different channels operate, in general, with different kinds of peripherals, each one with its own needs and its particular services, so that the assignments of a resource set for every kind of service to each channel constitutes a waste.
Even in the case of a specific peripheral, required resources will differ according to the specific requested service. For instance, a generic service for a character exchange will require more limited resources than is required for the service phase for preparing a character exchange in a disk or tape unit. Therefore, within a single channel, dedicated resources will be partly unused, i.e., idle for most of the time.